Freescale Semiconductor /MK24F25612 /MCG /C5

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Interpret as C5

7 43 0 0 00 0 0 0 0 0 0 0 0PRDIV00 (0)PLLSTEN0 0 (0)PLLCLKEN0

PLLSTEN0=0, PLLCLKEN0=0

Description

MCG Control 5 Register

Fields

PRDIV0

PLL External Reference Divider

PLLSTEN0

PLL Stop Enable

0 (0): MCGPLLCLK is disabled in any of the Stop modes.

1 (1): MCGPLLCLK is enabled if system is in Normal Stop mode.

PLLCLKEN0

PLL Clock Enable

0 (0): MCGPLLCLK is inactive.

1 (1): MCGPLLCLK is active.

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